PCB Design
5025 articles · Page 2 of 210
Designing a Robust 110VAC Inverter for Automotive Use: PCB Layout, Thermal Management, and EMI Compliance
A deep technical analysis of 110VAC automotive inverters — covering topology selection, high-speed gate drive layout, thermal design, ISO 7637-2 transient protection, FCC Part 15B/ CISPR 25 Class 5 compliance, and real-world validation with Victron Energy, Renogy, and Samlex models.
Sub-Nanosecond Egan Development Boards: Engineering Precision for 112 Gbps PAM4 and Beyond
A technical deep dive into Egan’s sub-nanosecond development boards—validated platforms for 112 Gbps PAM4 SerDes, featuring <850 fs jitter, <0.3 ps channel-to-channel skew, and impedance-controlled routing down to 42 Ω ±1.2 Ω. Covers layout methodology, measurement traceability, and real-world validation against IEEE 802.3ck and OIF CEI-112G-LR specs.
Isolation Transformers Deliver 97.5% Efficiency: Engineering Realities, Measurement Standards, and Design Trade-offs
A rigorous technical analysis of isolation transformer efficiency—why 97.5% is both achievable and meaningful in modern power electronics, grounded in IEEE C57.12.00 test protocols, thermal modeling, and real-world data from leading manufacturers including Hammond Manufacturing, Triad Magnetics, and TT Electronics.
DPO and DSA Oscilloscopes from Tektronix Accelerate High-Speed PCB Design Validation
How Tektronix DPO and DSA oscilloscopes—specifically the DPO70000SX, DSA8300, and 5 Series MSO—enable rigorous signal integrity analysis, jitter decomposition, and compliance testing for designs running at 25+ Gbps, including PCIe 6.0, DDR5, and USB4.
PC Board Design Environment Shines on the Internet: Cloud-Powered Precision for High-Speed PCB Engineers
How cloud-native PCB design platforms—Altium 365, Cadence Cloud, and Siemens Xcelerator—are transforming signal integrity analysis, collaboration, and manufacturability with real-time DFM checks, AI-assisted routing, and sub-100-fs jitter modeling.
0.6 V Reference Drives Next-Generation High-Current ICs: How Precision Voltage References Are Enabling Advanced Step-Down Controllers
This technical deep dive examines how ultra-stable 0.6 V internal voltage references in modern step-down controllers—such as TI’s TPS546D24, Infineon’s IR38263, and Renesas’ ISL99380—enable tighter regulation, lower output voltages, and higher current densities for AI accelerators, GPUs, and server SoCs operating below 0.8 V.
What’s All This Brick Stuff Anyhow? Demystifying PCB Stackup Terminology and Its Real-World Impact
A practical, engineer-to-engineer breakdown of 'brick' terminology in high-speed PCB design — what it means, why it matters for impedance control and signal integrity, and how real stackups from Intel, AMD, and NVIDIA use defined dielectric thicknesses to meet PCIe 6.0, DDR5, and USB4 specs.
U.S. Electronic Component Shipments to Rise 17% Annually in Nominal Terms Through 2022: Implications for PCB Design and High-Speed Routing
Analysis of the 17% annual nominal growth in U.S. electronic component shipments through 2022, with engineering-level insights on PCB layout implications, signal integrity challenges, thermal management, supply chain resilience, and design best practices for high-speed interfaces including PCIe Gen5, DDR5, and 100G Ethernet.
LEDs Will Light The Solid State Future: Engineering the Next Generation of Efficient, Reliable, and Smart Lighting
A deep technical examination of how modern LED technology—driven by gallium nitride (GaN), silicon carbide (SiC), advanced thermal management, and high-speed PCB design—is reshaping lighting, automotive systems, data communication, and human-centric applications—with real-world metrics, material science insights, and layout best practices.
What’s All This Floobydust Stuff Anyhow? Part 15: Controlled Impedance Routing, Stackup Integrity, and the Real Cost of ‘Good Enough’
A no-nonsense deep dive into controlled impedance routing pitfalls, PCB stackup validation, and why ignoring dielectric tolerance or copper roughness can cost $247K in re-spins — with real data from Intel, Rogers, and Cadence Sigrity simulations.
VME64 SBC Enlists Freescale’s QorIQ P4080: A High-Speed Signal Integrity and Layout Analysis
A deep technical analysis of the VME64 single-board computer integrating Freescale’s QorIQ P4080 SoC—covering PCB stackup, DDR3-1333 routing constraints, differential pair impedance control, VME bus timing closure, thermal management, and signal integrity validation at 160 MHz VME64 backplane speeds.
Bluetooth Embedded Communications Platform Debuts: A New Benchmark for Low-Power, High-Reliability Wireless Integration
A new Bluetooth embedded communications platform from Nordic Semiconductor, Silicon Labs, and u-blox—featuring the nRF54L15 SoC, EFR32BG24B210F512IM48, and UBX-B220-CC—sets new standards in RF coexistence, layout efficiency, and real-time latency. This article details PCB layout implications, signal integrity requirements, thermal management, and measured performance across 2.4 GHz ISM band operation.
Analog Devices Collaborates With Baidu To Advance Autonomous Driving: A High-Speed Signal Integrity Perspective
Analog Devices and Baidu have formed a strategic technical alliance to accelerate L4 autonomous driving deployment in China. This article analyzes the collaboration through the lens of PCB layout engineering, high-speed signal integrity, power delivery network design, and sensor fusion architecture — with specific attention to ADI’s A2B® bus, MAX25601 radar transceivers, and Baidu Apollo’s RT6 platform.
High Voltage, Low Current Diodes: Selection Criteria, Layout Pitfalls, and Real-World Design Constraints
A practical engineering guide to high-voltage, low-current diodes — covering breakdown voltage margins, leakage current trade-offs, thermal derating, PCB layout for partial discharge suppression, and comparative analysis of key devices from Vishay, ON Semiconductor, STMicroelectronics, and Diodes Inc.
Congatec SMARC 2.0 Creates a New IoT Playing Field
How Congatec’s implementation of the SMARC 2.0 specification—featuring PCIe Gen3 x4, USB 3.2 Gen2, dual-channel LPDDR4-3200, and industrial-grade thermal management—reshapes edge AI, smart factory, and medical IoT deployment strategies.
Designing a Supply Chain: Don’t Overlook These Eight Critical Factors
A high-speed PCB layout engineer’s perspective on supply chain design—covering component traceability, geopolitical risk, lead time variability, dual-sourcing validation, EOL management, logistics latency, quality certification rigor, and supplier financial health—with real-world data from Intel, TSMC, Murata, and TI.
Wireless Homeland Security and Don’t Forget About Cars: RF Resilience, V2X Vulnerabilities, and Real-World PCB Design Constraints
A technical deep dive into how wireless systems underpin U.S. homeland security infrastructure—and why automotive electronics pose unique, often overlooked, electromagnetic challenges for secure, high-integrity PCB design.
Protect Yourself From The Dangers Of Knockoff Battery Packs
Knockoff lithium-ion battery packs pose severe safety, performance, and regulatory risks—from thermal runaway to counterfeit cell labeling. This technical guide exposes real-world failure data, explains how to verify authenticity, and details the engineering red flags that distinguish genuine OEM modules from hazardous fakes.
Engineering High-Efficiency Power Conversion: The 55V 50A MOSFET with 0.8 mΩ On-Resistance
A deep technical analysis of modern 55V 50A power MOSFETs featuring ultra-low 0.8 mΩ Rds(on), including thermal design, PCB layout best practices, gate drive optimization, and real-world performance comparisons across Infineon, Vishay, ON Semiconductor, and STMicroelectronics devices.
Advanced Ferrite Materials Target High Power Designs: Thermal Stability, Core Loss Reduction, and GHz-Ready Magnetics
This technical deep dive examines next-generation ferrite materials engineered for high-power, high-frequency applications—from 3.3 kW server PSUs to 100+ A automotive DC-DC converters. We analyze TDK's PC95, Ferroxcube's 3F46, and Magnetics Inc.'s R2KB, benchmarking core loss density, Curie temperature, permeability retention, and thermal derating curves up to 150°C.
How GPS RFICs Thwart L-Band LTE Interference: Design Strategies, Filtering, and Real-World Validation
A technical deep dive into how modern GPS RF integrated circuits (RFICs) mitigate coexistence challenges with L-band LTE—specifically LTE Band 42 (3.4–3.6 GHz) and Band 43 (3.6–3.8 GHz)—that leak into the GPS L1 band (1575.42 MHz ± 15.36 MHz). Covers front-end filtering, image rejection, ADC dynamic range, and measured performance data from u-blox, Qualcomm, and Skyworks solutions.
Gyrator Circuit Makes DC Supply Invisible for AC Testing: A Practical Layout and Design Guide
How a carefully designed gyrator-based bias tee replaces bulky inductors and capacitors to isolate DC bias from AC test paths—enabling clean, wideband S-parameter measurements without supply noise coupling. Includes layout rules, component selection data (Mini-Circuits, Murata, Coilcraft), and measured insertion loss vs. frequency.
Step-Down Controller Targets Notebook CPUs: Precision Power Delivery for Modern Mobile Processors
A technical deep dive into high-efficiency, multi-phase step-down controllers optimized for Intel Core Ultra and AMD Ryzen 7040/8040-series notebook CPUs — covering architecture, thermal constraints, layout best practices, and real-world performance data from Intel VR14, AMD SVI2, and TI TPS53688 designs.
Boost Regulators Save Space: How Modern DC-DC Converters Enable Ultra-Compact PCB Layouts
Boost regulators dramatically reduce board area by integrating power stages, enabling higher switching frequencies, and eliminating bulky external components—verified with real-world designs from Texas Instruments, Analog Devices, and STMicroelectronics.